Judge the quality before you pay for it

Every switching regulator design begins with a question the datasheet will not answer for you: how much ripple can this load actually tolerate? The datasheet specifies what the regulator produces under reference conditions — it says nothing about what your downstream ADC, radio, or sensor front-end will forgive.

Consider a 3.3 V rail feeding a 12-bit ADC with a 1 LSB noise budget of 805 µV. A buck converter switching at 2.1 MHz with a 4.7 µH inductor and 22 µF of output capacitance will, on paper, produce roughly 8 mV of ripple — ten times your budget before the board is even routed. The standard response is to add a ferrite bead and a second-stage LC filter, and the standard result is a rail that rings at the filter's resonant frequency every time the load steps.

The better approach starts from the load's tolerance and works backward. This chapter builds that method: characterizing the real noise budget, selecting the switching frequency so its harmonics avoid your signal bands, and sizing the second-stage filter for damping first and attenuation second.